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CPU-71-15 - User Manual
24
DPD5MAN101
5.2. Power Sequence
12V and 5VDC on the VMEbus have no power sequence but 12 VDC is required to switch on the on-
board 5 VDC which is the source for all other voltages.
For internal use:
Turn the board power off when connecting the SF100 programming tool to the CN1 connector for
BIOS reprogramming.
Do not send the following signals when the CB_RESET# signal is being asserted.
Signals
LPC_SERIRQ
VGA_I
2
C_DAT
KBD_A20GATE
SDVO_I
2
C_DAT
GPI 0 to 3
LPC_DRQ 0 to 1#
LVDS_I
2
C_DAT
KBD_RST#
LPC_AD 0 to 3
Please make sure that the following signals will have no problem in your design even if voltage is
applied from the CPU-71-15 while the carrier board power is OFF.
Signals
LPC_SERIRQ
SUS_S4# PCI_FRAME# LVDS_I
2
C_CK
LVDS_I
2
C_DAT
SUS_S5# PCI_STOP# LVDS_I
2
C_DAT
VGA_I
2
C_DAT
I
2
C_CK PCI_IRDY# VGA_HSYNC
GPI 0 to 3
I
2
C_DAT PCI_TRDY# VGA_VSYNC
KBD_RST#
ATA_ACT# PCI_SERR# VGA_I
2
C_CK
KBD_A20GATE
GPO 0 to 3 PCI_PERR# VGA_I
2
C_DAT
LPC_DRQ 0 to 1#
THRMTRIP# PCI_DEVSEL# PCI_CLK
CB_RESET#
PCI_GNT0 to 3# PCI_LOCK# LPC_CLK
PCI_RESET#
PCI_AD0 to 31 LVDS_BKLT_EN LPC_FRAME#
SUS_STAT#
PCI_C/BE0 to 3# LVDS_VDD_EN LPC_AD0 to 3
SUS_S3#
PCI_PAR LVDS_BKLT_CTRL -
If your design does not conform to the above description, please check before using to avoid any
problems.
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