Eurotech ED-C3 02 Especificaciones Pagina 23

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DPD5MAN
1
5. PM
5.1. O
p
5.1.1. Ge
n
V
T
5.1.2. VI/
O
T
5.1.3. JN
4
T
b
c
o
5.1.4. Me
c
T
c
a
1
01
M
C Su
p
p
tional
P
n
era
l
V
ersions of t
h
they con
f
a x8 XM
C
USB por
t
USB por
t
T
he PLX PE
X
MHz. T
h
Univers
e
O
T
he PEX811
2
4
I/O Exp
a
T
he first PM
C
ackplane c
o
o
nnector.
chanical
D
T
he drawing
b
a
rd and the
C
p
port
a
P
MC M
o
h
e CPU-71-1
f
lict mechan
i
C
interface,
w
t
s, and the f
r
t
s, the PS/2
X
8112 chip b
h
e PCI bus i
s
e
limits the P
C
2
supports a
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nsion
C
site’s I/O
m
o
nnector. T
h
D
rawing
b
elow show
s
C
PU-71-15’
s
a
nd P
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dule S
5 that supp
o
i
cally with th
e
w
ill conflict
w
r
ont panel E
t
mouse and
k
ridges one
P
s
shared bet
w
C
I bus’s fre
q
signalling b
u
m
ay be route
d
h
e second
s
s
how a PM
C
s
printed cir
c
o
wer
C
upport
o
rt one or tw
o
e
front pane
l
w
ith the dual
t
hernet port.
k
eyboard po
P
CI Express
w
een the U
n
q
uency to 33
u
s of 5.0 VD
C
d
through th
s
ite’s I/O m
a
C
card will si
t
c
uit board (P
C
Caut
i
C
ycli
n
o
PMC sites
l
connectors
.
stacked SA
T
The secon
d
rt, and the L
V
Rev 2 lane
(
n
iverse and t
h
MHz.
C
.
e J14 (JN4
P
a
y be route
d
t
on the CP
U
C
B) is 0.370
i
ons for De
s
n
g
must be sp
e
.
The first si
t
T
A connecto
d
PMC site c
o
V
DS port.
(
@ 2.5 Gbp
s
h
e two optio
n
P
MC functio
d
through J
2
U
-71-15. Sp
a
.
s
igning a C
a
e
cial ordere
d
t
e, which al
s
r, 4 of the 5
f
o
nflicts with
) to the 32 b
n
al PMC sit
e
nality) to th
e
2
4 to the P
2
a
ce between
a
rrier Boar
d
23
d
because
s
o supports
f
ront panel
one of the
it @ 33
e
s. The
e
optional P
0
2
backplan
e
the PMC
d
0
e
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